1. Field of the Invention
This invention relates generally to the field of semiconductor device manufacturing and, more particularly, to a method and apparatus for controlling photolithography overlay registration incorporating feedforward overlay information.
2. Description of the Related Art
There is a constant drive within the semiconductor industry to increase the quality, reliability and throughput of integrated circuit devices, e.g., microprocessors, memory devices, and the like. This drive is fueled by consumer demands for higher quality computers and electronic devices that operate more reliably. These demands have resulted in a continual improvement in the manufacture of semiconductor devices, e.g., transistors, as well as in the manufacture of integrated circuit devices incorporating such transistors. Additionally, reducing the defects in the manufacture of the components of a typical transistor also lowers the overall cost per transistor as well as the cost of integrated circuit devices incorporating such transistors.
The technologies underlying semiconductor processing tools have attracted increased attention over the last several years, resulting in substantial refinements. However, despite the advances made in this area, many of the processing tools that are currently commercially available suffer certain deficiencies. In particular, such tools often lack advanced process data monitoring capabilities, such as the ability to provide historical parametric data in a user-friendly format, as well as event logging, real-time graphical display of both current processing parameters and the processing parameters of the entire run, and remote, i.e., local site and worldwide, monitoring. These deficiencies can engender nonoptimal control of critical processing parameters, such as throughput, accuracy, stability and repeatability, processing temperatures, mechanical tool parameters, and the like. This variability manifests itself as within-run disparities, run-to-run disparities and tool-to-tool disparities that can propagate into deviations in product quality and performance, whereas an ideal monitoring and diagnostics system for such tools would provide a means of monitoring this variability, as well as providing means for optimizing control of critical parameters.
Semiconductor devices are manufactured from wafers of a semiconducting material. Layers of materials are added, removed, and/or treated during fabrication to create the electrical circuits that make up the device. The fabrication essentially comprises four basic operations. Although there are only four basic operations, they can be combined in hundreds of different ways, depending upon the particular fabrication process.
The four operations typically used in the manufacture of semiconductor devices are:                layering, or adding thin layers of various materials to a wafer from which a semiconductor device is produced;        patterning, or removing selected portions of added layers;        doping, or placing specific amounts of dopants in the wafer surface through openings in the added layers; and        heat treatment, or heating and cooling the materials to produce desired effects in the processed wafer.        
As technology advances facilitate smaller critical dimensions for semiconductor devices, the need for reduction of errors increases dramatically. Proper formation of sub-sections within a semiconductor device is an important factor in ensuring proper performance of the manufactured semiconductor device. Critical dimensions of the sub-sections generally have to be within a predetermined acceptable margin of error for semiconductor devices to be within acceptable manufacturing quality.
One important aspect of semiconductor manufacturing is overlay control. Overlay control involves measuring the misalignment between two successive patterned layers on the surface of a semiconductor device. Generally, minimization of misalignment errors is important to ensure that the multiple layers of the semiconductor devices are connected and functional. As technology facilitates smaller critical dimensions for semiconductor devices, the need for the reduction of misalignment errors increases dramatically.
Generally, a set of photolithography steps is performed on a lot of wafers using a semiconductor manufacturing tool commonly referred to as an exposure tool or a stepper. The manufacturing tool communicates with a manufacturing framework or a network of processing modules. The manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which the stepper is connected, thereby facilitating communications between the stepper and the manufacturing framework. The machine interface may generally be part of an advanced process control (APC) system. The APC system initiates a control script, which can be a software program that automatically retrieves the data needed to execute a manufacturing process. The input parameters that control the manufacturing process are revised periodically in a manual fashion. As the need for higher precision manufacturing processes are required, improved methods are needed to revise input parameters that control manufacturing processes in a more automated and timely manner.
Typical overlay control techniques employ a feedback control methodology, where after patterning a layer of photoresist material, metrology data is collected to measure misregistration, or overlay error, between the photoresist layer and underlying layer(s). The feedback generated from the overlay error measurement may be provided to a process controller for updating the control signals of the photolithography tools for subsequently processed wafers. The overlay error may also be used in a fault detection scheme, whereby wafers with overlay errors that exceed a predetermined threshold are reworked by removing the errant photoresist layer and patterning a new one.
Feedback overlay techniques assume homogeneity between the wafer on which the overlay error is measured and the subsequent wafers to be patterned by the photolithography tool. As wafer processing techniques change from lot-to-lot control to wafer-to-wafer control, this assumption becomes less valid. A particular wafer, lot, or subset of wafers in a lot may not have identical overlay characteristics with respect to the underlying layers. A control action may have been take during the processing of wafers in a lot to reduce overlay errors or to correct a fault condition (i.e., rework). Accordingly, controlling overlay parameters based solely on feedback metrology data may not result in an adequate reduction of overlay variations.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.